About Cache Associativity in Low-Cost Shared Memory Multi-Microprocessors

Architecturesparalì eles, bases de données, réseaux et systèmes distribués About cache associativity in low-cost shared memory multi-microprocessors Abstract: In 1993, sizes of on-chip caches on current commercial microprocessors range from 16K bytes to 36 Kbytes. These microprocessors can be directly used in the design of a low cost single-bus shared memory multiprocessors without using any second-level cache. In this paper, we explore the viability of such a multi-microprocessor. Simulations results clearly establish that performance of such a system will be quite poor if on-chip caches are direct-mapped. On the other hand, when the on-chip caches are partially associative, the achieved level of performance is quite promising. In particular, two recently proposed innovative cache structures, the skewed associative cache organization and the semi-uniied cache organization are shown to work ne. De l'associativit e des caches dans les multi-microprocesseurs a co^ ut mod er e R esum e : Aujourd'hui la taille des caches internes des microprocesseurs permet d'envisa-ger la construction de multi-microprocesseurs a bus commun a co^ ut extr emement mod er e, c'-ad sans cache secondaire. Dans ce rapport, nous etudions l'impact de l'assopciativit e sur des caches internes sur les performances de tels syst emes. En particulier, les caches skewed-associatifs et semi-unii es sont evalu es. About cache associativity in low-cost shared memory multi-microprocessors